There are many compound semiconductor stacked bodies that are industrially useful, and magnetic sensors, such as Hall elements, magneto-resistance effect elements, etc., that use InSb as an active layer are already being put to practical use. Further, in addition to infrared sensors that use InSb, application to transistors is being researched actively in recent years. Optical devices using a nitride, such as GaN, etc., as the active layer are becoming practicable.
It is difficult to produce a bulk single crystal of a compound semiconductor, such as InSb, GaN, etc., and thus normally, these compound semiconductors have been put to use in the form of a thin film formed on a GaAs substrate, Si substrate, or sapphire substrate.
Si substrates that are larger in diameter and far inexpensive in comparison to GaAs substrates and sapphire substrates are supplied to the market with stability. Also in consideration of transistor applications, growth on Si substrates is important for integration.
Forming of a compound semiconductor film on a Si substrate is considered to be technically difficult. For example, in the case of InSb, a complex process is required as disclosed in Patent Document 1. That is, first, Si is hydrogen terminated, and an underlayer of In, etc., formed in vacuum at a low temperature. A pre-deposition layer, made of In and Sb, is then formed on the underlayer. Further, an InSb layer is formed on the pre-deposition layer at a temperature higher than the temperature at which the above layers were formed, and the process is thus complex.
Further, the InSb film obtained by such a method is inadequate in terms of characteristics, and at a thickness of 4 μm, although the electron mobility takes on a high value of 50,000 cm2/Vs, the Hall coefficient is only approximately 320 cm3/C to 480 cm3/C.
Normally, the performance of a semiconductor film is evaluated by a value determined by dividing the Hall coefficient by the film thickness. The characteristic determined by dividing by the film thickness is 800,000 cm2/C to 1,200,00 cm2/C. This numerical value indicates that a large amount of defect-induced carriers is contained. Although application to a magneto-resistance effect element that makes use of the high electron mobility is possible, application to a Hall element or a transistor, with which the defects present a problem, is difficult. Also, even with a magneto-resistance effect element, although it is known that temperature characteristics can be improved by doping of an n-type dopant, the resistance becomes too small when doping is performed because a high amount of carriers is present originally, and thus with the InSb film described above, improvement in the temperature characteristics by doping is substantially difficult.
As a countermeasure for the above, for example, by first forming a GaAs layer on an Si substrate and then forming an InSb film on the GaAs layer as disclosed in Patent Document 2, the characteristics of the InSb film can be improved significantly such that the Hall coefficient is approximately 370 cm3/C at a film thickness of 1 μm and the value divided by the film thickness is 3,700,000 cm2/C. However, the forming of the GaAs layer on the Si substrate requires a higher temperature than that at which the InSb film is formed, and for application to a transistor, etc., it is more preferable to directly form the InSb film on the Si substrate. Although there is thus a need to form a compound semiconductor, which serves as an active layer of high quality, directly on an Si substrate, this is difficult to achieve with the conventional arts.
The present invention has been made in view of the above circumstances, and an object thereof is to provide a compound semiconductor lamination that enables an InSb or other compound semiconductor film to be formed directly on an Si substrate to industrially promote development of applications to magnetic sensors, such as Hall elements, magneto-resistance elements, etc., optical devices, such as infrared sensors, etc., and electronic devices, such as transistors, etc., and to provide a method for manufacturing the compound semiconductor lamination and a semiconductor device.
Patent Document 1: Japanese Patent Laid-Open No. H7-249577 (1995)
Patent Document 2: International Patent Publication No. WO2004/077585 Pamphlet
Non-Patent Document 1: 1996 National Technical Report, Vol. 42, No. 4, p. 86 in pp. 84-92.
Non-Patent Document 2: Journal of the Surface Science Society of Japan, Vol. 20, No. 10, pp. 680-684 (1999).